The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 03, 2003
Filed:
Jul. 08, 1999
Applicant:
Inventors:
Christopher J. Pass, San Jose, CA (US);
James D. Sansbury, Portola Valley, CA (US);
Raminda U. Madurawe, Sunnyvale, CA (US);
John E. Turner, Santa Cruz, CA (US);
Rakesh H. Patel, Cupertino, CA (US);
Peter J. Wright, Sunnyvale, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1336 ; H01L 2/1339 ; H01L 2/1338 ; H01L 2/18238 ; H01L 2/9788 ;
U.S. Cl.
CPC ...
H01L 2/1336 ; H01L 2/1339 ; H01L 2/1338 ; H01L 2/18238 ; H01L 2/9788 ;
Abstract
A technique of fabricating a nonvolatile device includes forming a low doping region to aid in the reduction of substrate hot electrons. The nonvolatile device may be a floating gate device, such as a Flash, EEPROM, or EPROM memory cell. The low doping region has a lower doping concentration than that of the substrate. By reducing substrate hot electrons, this improves the reliability and longevity of the nonvolatile device.