Circuit for improved test and calibration in automated test equipment

Abstract

In at least one embodiment, a circuit for a multi-channel tester having a central resource, a plurality of outputs, and a switching matrix coupling the central resource to the plurality of outputs via a plurality of selectable channels. Each of the selectable channels having PIN diodes coupled in a half-bridge configuration. A first, a second, and a third biasing source for forward biasing the PIN diodes. The first and second biasing sources are coupled to a central resource coupled end and an output coupled end of the half-bridge, respectively. The third biasing source is coupled to a common node. The first and second biasing sources are constructed to provide substantially balanced outputs and such that the sum of the outputs of the first and second biasing sources are substantially balanced with respect to the output of the third bias source. In some embodiments, a the plurality of selectable channels comprises the same first biasing source. In some embodiments, each of the plurality of channels comprises a different second biasing source. In some embodiments, pin electronics drivers can be used as the second biasing source. In some embodiments, a single third biasing source can be coupled to each of the common nodes of the plurality of selectable channels via one of a plurality of switches. In some embodiments, the PIN diodes can be located near the central resource end of the channel and near the output pin end of the channel allowing cleaner more accurate voltage/timing measurements.