Method to form shallow junction transistors while eliminating shorts due to junction spiking

Abstract

A method of forming shallow junction MOSFETs is achieved. A gate oxide layer is formed overlying a substrate. A first electrode layer, of polysilicon or metal, is deposited. A silicon nitride layer is deposited. The silicon nitride layer and the first electrode layer are etched through to form temporary MOSFET gates. Ions are implanted into the substrate to form lightly doped junctions. A spacer layer is deposited. The spacer layer and the gate oxide layer are anisotropically etched to form sidewall spacers. Ions are implanted into the substrate to form heavily doped junctions. The silicon nitride layer is etched away. A second electrode layer, of polysilicon or metal, is deposited overlying the substrate, the sidewall spacers, and the first polysilicon layer. The second electrode layer is polished down to the top surfaces of the sidewall spacers to complete the MOSFETs and to form permanent gates and conductive connections to the source and drain junctions. The second electrode layer is etched through to form separate conductive connections. An intermetal dielectric layer is deposited. The intermetal dielectric layer is etched through to form contact openings. A metal layer is deposited and etched through to form separate metal interconnects. A passivation layer is deposited, and the integrated circuit is completed.