The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2003

Filed:

Dec. 11, 2000
Applicant:
Inventors:

John Moondanos, Folsom, CA (US);

Carl J. Seger, Hillsboro, OR (US);

Ziyad Hanna, Haifa, IL;

Daher Adil Kaiss, Nahif Village, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ; G06F 9/45 ;
U.S. Cl.
CPC ...
G06F 1/750 ; G06F 9/45 ;
Abstract

The present invention provides a method and system for comparing a pair of circuit models without the need for performing a false negative check when cut-points are introduced. An exemplary method includes generating a BDD for each of a plurality of signals of each circuit model from an initial cut-point frontier towards an output of each circuit model until a BDD of one of the plurality of signals reaches a predetermined maximum size, selecting a new cut-point signal frontier, and generating a normalized function for each cut-point signal on the new cut-point frontier of each circuit model.


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