The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2003

Filed:

Sep. 30, 1998
Applicant:
Inventor:

Mitsuhiro Horikawa, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/131 ; H01L 2/1322 ;
U.S. Cl.
CPC ...
H01L 2/131 ; H01L 2/1322 ;
Abstract

There is prepared a wafer ( ) having a gettering capability such as PBS wafer having deposition of polysilicon on its back surface thereof, IG wafer containing oxygen precipitates. An element separation silicon oxide film ( ) is formed on the wafer ( ), and a first silicon oxide film ( ) is formed on the wafer ( ). Then the wafer ( ) is gradually cooled to a low temperature, or the wafer ( ) is cooled to a low temperature and then kept at the low temperature for a fixed time. Thereafter, the first silicon oxide film ( ) is removeed from the wafer ( ) and then the wafer ( ) is cleaned. Thereafter, a gate silicon oxide film ( ) and a gate electrode ( ) are formed. Subsequently, ion implantation to form a source ( ) and a drain ( ) and a heat treatment to activate implanted impurities are performed to form a basic MOS transistor.


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