The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2003
Filed:
Sep. 19, 2001
David H. Hinzel, Fairfax, VA (US);
Charles L. Goldsmith, Plano, TX (US);
Lloyd F. Linder, Agoura Hills, CA (US);
Raytheon Company, Lexington, MA (US);
Abstract
A method of integrating MEMS devices with non-MEMS circuitry requires fabricating non-MEMS devices on a substrate in a conventional fashion. A thick dielectric layer is deposited on the completed devices, and the MEMS devices fabricated on the dielectric layer. Vias through the dielectric layer interconnect the MEMS devices to the non-MEMS electronics. The interposed dielectric layer allows the common substrate to have characteristics that best suit the non-MEMS components, without degrading the MEMS performance. Another approach involves bonding together two separate wafers—one for the MEMS devices and one for non-MEMS electronics. A package lid, having filled vias formed therethrough, is bonded to the MEMS wafer, sealing the MEMS devices within. The non-MEMS wafer is mounted to the lid, with the vias effecting the necessary interconnections between the two wafers. This enables the MEMS devices and the non-MEMS electronics to function as a single IC, while retaining the established processes associated with each component type.