The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2003

Filed:

Nov. 08, 1999
Applicant:
Inventors:

Robert Paul Masleid, Monte Sereno, CA (US);

Donald George Mikan, Jr., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/06 ; G06F 1/04 ;
U.S. Cl.
CPC ...
G06F 1/06 ; G06F 1/04 ;
Abstract

An on-chip clock distribution system and method which utilizes local clock buffers to provide an improved clock signal distribution while avoiding the disadvantages of conventional central buffer and repowered distribution systems. The system also reduces distribution routing problems and distributes “delta-I” problem and thermal problem, and also supports better local delay tuning.


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Masleid, Robert. (2003). High gain local clock buffer for a mesh clock distribution utilizing a gain enhanced split driver clock buffer (U.S. Patent No. 6532544). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6532544

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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