The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2003
Filed:
May. 09, 2001
Chih-Hsing Yu, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-Chu, TW;
Abstract
A method for fabricating a CUB DRAM device having an enlarged process window for bit line contact patterning is deacribed. A plurality of capacitor node contact junctions and a bit line junction are provided in a semiconductor substrate. A node contact plug is formed through a first insulating layer to each of the capacitor node contact junctions. A bit line contact plug is formed to the bit line junction. Openings are etched through a second insulating layer to each of the node contact plugs. A polysilicon layer is conformally deposited within the openings and then recessed below the top of the openings wherein each of the polysilicon layers forms a bottom plate electrode of a capacitor. A capacitor dielectric layer is formed overlying the bottom plate electrodes and the second insulating layer. A polysilicon layer is deposited overlying the capacitor dialectic layer and patterned to form top capacitor plates overlying each of the bottom plate electrodes to complete the capacitors. An opening is etched through a third and the second insulating layers between the capacitors to the bit line contact plug and filled with a conducting layer to form a bit line to complete fabrication of a DRAM with CUB cell in an integrated circuit device.