Self-aligned active array along the length direction to form un-biased buried strap formation for sub-150 nm best dram devices

Abstract

An improved buried strap method in the fabrication of a DRAM integrated circuit device where the active area is self-aligned to the deep trench in the length direction only is described. An etch stop layer is provided on a substrate. A deep trench is etched into the substrate not covered by the etch stop layer and filled with a silicon layer to form a deep trench capacitor. A polysilicon layer is deposited over the capacitor to form a buried strap. A liner layer is deposited over the etch stop layer and the buried strap having the same material as the etch stop layer. A hard mask material is deposited over the liner layer and etched where it is not covered by a mask wherein etching stops at the liner layer. The liner layer and the etch stop layer are etched away where they are not covered by the hard mask layer to form an etch stop frame. The substrate and the deep trench are etched into where they are exposed by the hard mask and the etch stop frame to form isolation trenches. The isolation trenches are filled with a dielectric layer. Gate electrodes are formed overlying the isolation trenches and the substrate. The substrate is annealed whereby dopants from the buried strap diffuse into the substrate to form a buried strap diffusion wherein the buried strap diffusion connects the deep trench capacitor to one of the gate electrodes to complete the buried strap DT DRAM device.