The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2003

Filed:

May. 16, 2002
Applicant:
Inventors:

Zhongyi Xia, Boise, ID (US);

Jimmy J. Browning, Boise, ID (US);

Charles M. Watkins, Eagle, ID (US);

David A. Cathey, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01J 9/227 ;
U.S. Cl.
CPC ...
H01J 9/227 ;
Abstract

A high resolution field emission display includes a faceplate and a baseplate. The faceplate includes a transparent viewing layer, a transparent conductive layer formed on the transparent viewing layer and intersecting stripes of light-absorbing, opaque insulating material formed on the transparent conductive layer. The insulating material defines openings less than one hundred microns wide between the intersecting stripes. The faceplate also includes a plurality of localized regions of cathodoluminescent material, each formed in one of the openings. The cathodoluminescent material includes a metal oxide providing reduced resistivity in the cathodoluminescent material. Significantly, the reduced resistivity of the cathodoluminescent material together with the focusing effect of the insulating material provide increased acuity in luminous images formed on the faceplate. The baseplate includes a substrate, an emitter formed on the substrate and a dielectric layer formed on the substrate and having an opening formed about the emitter. The baseplate also includes a conductive extraction grid formed on the dielectric layer and having an opening formed about the emitter.


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