The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2003

Filed:

Dec. 10, 2001
Applicant:
Inventors:

Yasuhisa Shimazaki, Tachikawa, JP;

Kenichi Osada, San Jose, CA (US);

Hiroshi Maruyama, Yokohama, JP;

Naotoshi Nishioka, Fuchu, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/06 ; G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 5/06 ; G11C 7/00 ;
Abstract

A semiconductor storage device controls crosstalk of write data to read data during reading and writing operations performed in the same cycle. The device has a plurality of work lines WL, a plurality of bit lines LBL, memory cells CELL which are connected to the word lines and the bit lines, reading global bit lines RGBL connected to a sense amplifier SA and writing global bit lines WBGL connected to a write amplifier WA. A selection circuit YSWn selectively connects the reading and writing global bit lines with the local bit lines. For first and second writing global bit lines arranged between first and second reading global bit lines, a distance between the first writing global bit line and the first reading global bit line, or a distance between the second writing global bit line and the second reading global bit line being is longer than a distance between the first and second writing global bit lines. Alternatively, the writing and reading global bit lines are formed in different wiring layers in the substrate of the device.


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