The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2003

Filed:

Dec. 30, 1999
Applicant:
Inventors:

Kazunobu Ota, Tokyo, JP;

Masashi Kitazawa, Tokyo, JP;

Masayoshi Shirahata, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/976 ;
U.S. Cl.
CPC ...
H01L 2/976 ;
Abstract

A gate electrode (GE ) includes a polysilicon layer ( C), silicon oxide films (reoxidation films) a metal layer ( C), and silicide films ( ). The polysilicon layer ( C) is formed on a main surface ( BS) of a gate insulating film ( B), and the silicon oxide films ( ) are formed on the side walls ( CW) of the polysilicon layer ( C). The metal layer ( C) is formed in contact with the main surface ( CS ) of the polysilicon layer ( C) on the opposite side to the gate insulating film ( B). The silicide films ( ) are formed on the side walls ( CW) of the metal layer ( C) (which are composed of side walls ( CW and CW) of first and second metal layers ( and )). After the silicide films ( ) are formed, the metal layer ( C) is protected by the silicide films ( ). This structure provides an MOS transistor having a polymetal gate in which oxidation of the metal layer is prevented to realize lower resistivity.


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