The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2003

Filed:

Nov. 30, 2001
Applicant:
Inventor:

Dan M. Mosher, Plano, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/976 ; H01L 2/994 ; H01L 3/1062 ; H01L 3/1113 ; H01L 3/1119 ;
U.S. Cl.
CPC ...
H01L 2/976 ; H01L 2/994 ; H01L 3/1062 ; H01L 3/1113 ; H01L 3/1119 ;
Abstract

A semiconductor device comprising a first transistor ( ) and a second transistor ( ), both formed in a semiconductor substrate ( ). The first transistor comprises a gate conductor ( ) and a gate insulator ( ) separating the gate conductor from a semiconductor material and defining a channel area ( ) in the semiconductor material opposite from the gate conductor. The first transistor further comprises a source (S ) comprising a first doped region ( ) of a first conductivity type and adjacent the channel area. Further, the first transistor comprises a drain (D ). The drain comprises a first well ( ) adjacent the channel area and having a first concentration of the first conductivity type and a first doped region portion and a second doped portion ( ). The first doped portion has a second concentration of the first conductivity type. The second concentration is greater than the first concentration and the first doped region portion has a common interface with the first well. The second doped region portion has the second concentration of the first conductivity type, wherein the second doped region portion has no common interface with the first well and is not adjacent the channel area. The second transistor ( ) comprises a second well ( ) formed using the same implant step as the first well and thereby having the first concentration of the first conductivity type. The second transistor further comprises a first source/drain ( ) and a second source/drain ( ), both comprising a second conductivity type complementary of the first conductivity type and formed within the second well.


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