The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2003

Filed:

Jul. 19, 2000
Applicant:
Inventor:

James A. Cunningham, Saratoga, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/144 ;
Abstract

A method for making an integrated circuit device includes forming at least one interconnect structure adjacent a semiconductor substrate and including a copper portion and at least one barrier layer adjacent to the copper portion, and displacement plating surface portions of the copper portion with a plating metal more noble than copper and different than copper. The method including displacement plating provides selective and self-limiting thickness plating and enhances the electromigration resistance of the interconnect structure. The displacement plating may include subjecting the copper portion to a plating bath including the plating metal. Because displacement plating is used and is not an electroless plating process, the concentration of the metal in the aqueous plating bath and the plating time are not critical. The method may further include annealing the integrated circuit device after the displacement plating to diffuse the plating metal into the copper portion. The plating metal may comprise at least one of silver, gold, mercury, rhodium, palladium, iridium, and platinum.


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