The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 18, 2003
Filed:
Jan. 11, 2002
Ray D. Harrison, Garland, TX (US);
Jianbai Zhu, Plano, TX (US);
Kendall S. Wills, Sugarland, TX (US);
Willmar Subido, Garland, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The present invention provides a system and method for preparing semiconductor integrated circuits (“ICs”), particularly ball grid arrays (“BGAs”), quad flat packs (“QFPs”) and dual in line packages (“DIPs”) for failure analysis (“FA”) using a variety of techniques, including emission microscopy (“EM”) and externally induced voltage alteration (“XIVA”). This system and method requires precision thinning and polishing of the semiconductor IC device to expose the backside of the die and mounting of the semiconductor device on a secondary package assembly.