The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 04, 2003
Filed:
May. 01, 2001
Applicant:
Inventors:
Yoshikazu Miyawaki, Hyogo, JP;
Satoshi Shimizu, Hyogo, JP;
Atsushi Ohba, Hyogo, JP;
Mitsuhiro Tomoeda, Hyogo, JP;
Assignee:
Other;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 1/606 ;
U.S. Cl.
CPC ...
G11C 1/606 ;
Abstract
Erasing is performed two times for narrowing a distribution width of threshold voltages of memory cells, and reducing the number of memory transistors to be subjected to over-erase verify. The erase verify voltage for the first erasing is set more strictly than the erase verify voltage for the second erasing. The erase pulses for the second erasing can be reduced in number, and the erasing time can be further reduced.
Miyawaki, Yoshikazu. (2003). Nonvolatile semiconductor memory device having reduced erase time and method of erasing data of the same (U.S. Patent No. 6515908). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6515908
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile