The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2003

Filed:

Aug. 13, 2001
Applicant:
Inventors:

Mark G. Johnson, Los Altos, CA (US);

Thomas H. Lee, Cupertino, CA (US);

Vivek Subramanian, Redwood City, CA (US);

P. Michael Farmwald, Portola Valley, CA (US);

N. Johan Knall, Sunnyvale, CA (US);

Assignee:

Matrix Semiconductor, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/100 ;
U.S. Cl.
CPC ...
G11C 1/100 ;
Abstract

A low-cost memory cell array includes multiple, vertically-stacked layers of memory cells. In one form, each memory cell is characterized by a small cross-sectional area and a read current less than 6.3 microamperes. The resulting memory array has a slow access time and is well-suited for digital media storage, where access time requirements are low and the dramatic cost reductions associated with the disclosed memory arrays are particularly attractive. In another form, each memory cell includes an antifuse layer and diode components, wherein at least one diode component is heavily doped (to a dopant concentration greater than 10 /cm ), and wherein the read current is large (up to 500 mA).


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