The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2003

Filed:

Feb. 22, 2000
Applicant:
Inventors:

Kan-Yin Ng, Maryland Heights, MO (US);

Brent Teasley, Silex, MO (US);

Assignee:

MEMC Electronic Materials, Inc., St. Peters, MO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B29B 2/902 ;
U.S. Cl.
CPC ...
B29B 2/902 ;
Abstract

A method for processing a semiconductor wafer to reduce surface roughness. The wafer has two flat, opposite faces with a peripheral edge extending around a circumference of the wafer between the faces. The method includes, in the following order, the steps of burnishing the edge, and etching the edge. The step of burnishing is defined by a relative rubbing motion between the edge and an abrasive appliance to remove damage from the edge, the rubbing motion occurring free from any polishing solution or chemical slurry. The step of etching includes exposing the wafer to a liquid chemical etchant for a period of time to remove additional damage from the edge. The method may also include, before the other steps, a step of lapping at least one face of the wafer to remove semiconductor matter through a relative rubbing motion between the face and an abrasive lapping plate in the presence of an abrasive liquid slurry.


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