The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2003
Filed:
Sep. 21, 2001
Andrea Sacco, Alessandria, IT;
Osama Khouri, Milan, IT;
Rino Micheloni, Turate, IT;
Guido Torelli, Sant'Alessio Con Vialone, IT;
STMicroelectronics S.r.l., Agrate Brianza, IT;
Abstract
Described herein is a nonvolatile memory comprising a memory array organized according to global word lines and local word lines; a global row decoder; a local row decoder; a first supply stage for supplying the global row decoder; and a second supply stage for supplying the local row decoder; and a third supply stage for biasing the drain and source terminals of the memory cells of the memory array. Each of the supply stages comprises a respective resistive divider formed by a plurality of series-connected resistors, and a plurality of pass-gate CMOS switches each connected in parallel to a respective resistor. The nonvolatile memory further comprises a control circuit for controlling the pass-gate CMOS switches of the supply stages, and a switching circuit for selectively connecting the supply input of the control circuit to the output of the second supply stage during reading and programming of the memory, and to the output of the third supply stage during erasing of the memory.