The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2002

Filed:

Aug. 28, 2001
Applicant:
Inventors:

Jeong Yeol Choi, Palo Alto, CA (US);

Sang-Yun Lee, Beaverton, OR (US);

Assignee:

Integrated Device Technology, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/500 ;
U.S. Cl.
CPC ...
G11C 1/500 ;
Abstract

A ternary CAM system includes a main memory cell configured to store complementary data signals D/D#. A first transistor has a source coupled to receive data signal D#, and a gate coupled to receive a compare signal C. A second transistor has a source coupled to receive data signal D, and a gate coupled to receive complementary compare signal C#. A third transistor has a gate coupled to drain regions of the first and second transistors. A mask cell storing a mask value is coupled to the source of the third transistor. A pre-charged match line is coupled to the drain of the third transistor. If compare signals C/C# match data signals D/D#, then the third transistor is turned off, thereby isolating match line and mask cell. If compare signals C/C# don't match data signals D/D#, then the third transistor is turned on, thereby coupling mask cell and match line.


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