The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2002

Filed:

May. 21, 2002
Applicant:
Inventors:

Wen-Bin Tsai, Tainan, TW;

Chun-Pei Wu, Nantou Hsien, TW;

Hui-Huang Chen, Hsin-Chu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/176 ;
U.S. Cl.
CPC ...
H01L 2/176 ;
Abstract

A process for fabricating a sharp corner-free shallow trench isolation structure. First, a SiON layer and a mask layer are successively formed on a semiconductor substrate. The SiON layer and mask layer are patterned to form an opening, exposing the substrate region on which a shallow trench isolation region will be formed. Next, an oxide spacer is formed on sidewalls of the SiON layer and mask layer. A trench is formed in the semiconductor substrate using the spacer and mask layer as a mask. Next, a liner oxide layer is formed on the surface of the trench by thermal oxidation, such that the liner oxide layer near the SiON layer is in a bird's beak form. An isolating oxide layer is filled in the trench. Finally, the mask layer and SiON layer are removed. The present invention forms a short and thick bird's beak structure and rounded trench corner. Therefore, the thickness of the tunnel oxide is even and the tunnel oxide integrity remains. Thus, the electric current is not accumulated on the trench corner, and parasitic transistors and current leakage can be prevented.


Find Patent Forward Citations

Loading…