The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2002

Filed:

Jul. 25, 2000
Applicant:
Inventors:

Yoshihiro Yamaguchi, Fukuoka, JP;

Katsumi Satoh, Tokyo, JP;

Noritoshi Hirano, Fukuoka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/906 ; H01L 2/358 ; H01L 2/393 ;
U.S. Cl.
CPC ...
H01L 2/906 ; H01L 2/358 ; H01L 2/393 ;
Abstract

A semiconductor device ( ) comprises an N type semiconductor substrate ( ). A P layer ( ) is formed in a first surface (S ) of the semiconductor substrate ( ), and a P layer ( ) is formed in the semiconductor substrate ( ) and in contact with the first surface (S ) and a second surface (S ) of the semiconductor substrate ( ) corresponding to a beveled surface. The P layer ( ) surrounds the P layer ( ) in non-contacting relationship with the P layer ( ). A separation distance (D) between the P layers ( ) is set at not greater than 50 &mgr;m. A distance (D ) between a third surface (S ) of the semiconductor substrate ( ) and a portion of the P layer ( ) which is closer to the third surface (S ) is less than a distance (D ) between the third surface (S ) and a portion of the P layer ( ) which is closer to the third surface (S ). An N layer ( ) is formed in part of the third surface (S ) which is substantially opposed to the P layer ( ), and an N layer ( ) is formed in contact with the N layer ( ) and the third surface (S ). A cathode electrode ( ) is formed on the third surface (S ) so as to cover a region (S ) of the third surface (S ) which is opposed to the P layer ( ). The semiconductor device ( ) suppresses heat generation to perform a stable operation.


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