The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2002
Filed:
Feb. 23, 2001
Yoshimi Shioya, Tokyo, JP;
Kouichi Ohira, Tokyo, JP;
Kazuo Maeda, Tokyo, JP;
Tomomi Suzuki, Tokyo, JP;
Hiroshi Ikakura, Tokyo, JP;
Youichi Yamamoto, Tokyo, JP;
Yuichiro Kotake, Tokyo, JP;
Shoji Ohgawara, Tokyo, JP;
Makoto Kurotobi, Tokyo, JP;
Other;
Abstract
Disclosed is a method of fabricating a semiconductor device, in which an interlayer insulating film having a low dielectric constant is formed by coating a wiring, and either a via hole or a contact hole is formed in the interlayer insulating film. The method of fabricating a semiconductor device having the interlayer insulating film formed on the film-formed substrate with the exposed wiring , comprises the step of converting a silicon compound containing only the Si, O, C and H into a plasma gas as a film-forming gas to react the plasma gas, thus forming the block insulating film containing silicon (Si), oxygen (O), carbon (C) and hydrogen (H) between the wiring and the interlayer insulating film