The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2002
Filed:
Aug. 06, 1999
Jawji Chen, Fremont, CA (US);
Shuen-Chin Chang, San Jose, CA (US);
Yong E. Park, Los Altos, CA (US);
Cindy Yuklin Ng, Cupertino, CA (US);
Chiayao S. Tung, Cupertino, CA (US);
Jeongsik Yang, Kyungpook, KR;
Integrated Memory Logic, Inc., Campbell, CA (US);
Abstract
An I/O interface circuit includes an output buffer circuit and an input buffer circuit. The output buffer circuit can receive a first stream of data elements for output from the semiconductor chip, add a separate reference element for each data element in the first stream, and generate a first data transmission signal representing the data elements of the first stream and the respective reference elements. The input buffer circuit can receive a second data transmission signal representing data elements of a second stream and respective reference elements for the data elements of the second stream, sample the second data transmission signal to obtain voltage values for each data element of the second stream and the respective reference element, and interpret the voltage value for each data element of the second stream against the voltage value for the respective reference element in order to recover the data elements of the second stream.