The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2002
Filed:
Oct. 11, 2000
Applicant:
Inventors:
Richard M. Fastow, Cupertino, CA (US);
Mark W. Randolph, San Jose, CA (US);
Shane C. Hollmer, San Jose, CA (US);
Assignee:
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 1/604 ;
U.S. Cl.
CPC ...
G11C 1/604 ;
Abstract
A bit line selector for a virtual ground non-volatile read only memory (“NROM”) cell array is disclosed. The selector transistors are oriented such that the channel length is perpendicular to the bit line and the channel width is parallel to the bit line. Subsequent reduction in the bit line pitch does not affect the channel width of the select transistors or their drive current.
Fastow, Richard. (2002). Select transistor architecture for a virtual ground non-volatile memory cell array (U.S. Patent No. 6477083). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6477083
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile