The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2002

Filed:

Dec. 04, 2000
Applicant:
Inventors:

Yuan-Liang Li, Chandler, AZ (US);

David G. Figueroa, Mesa, AZ (US);

Priyavadan R. Patel, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/352 ;
U.S. Cl.
CPC ...
H01L 2/352 ;
Abstract

The invention provides an electronic assembly including a semiconductor chip and a semiconductor package substrate having power and ground shunts. The power and ground shunts of the semiconductor chip include contact pads on a surface thereof that are electrically connected to one another to protect electrical signal contacts on the contact pads from high, low-frequency current. The power shunt in the semiconductor package substrate connects one power plane to another and the ground shunts in the semiconductor package substrate connects one ground plane to another. The power and ground shunts in the semiconductor package substrate dictate terminal pins thereon from high, low-frequency current.


Find Patent Forward Citations

Li, Yuan-Liang. (2002). Electronic assembly providing shunting of electrical current (U.S. Patent No. 6476477). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6476477

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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