Input buffer of a semiconductor device that gives only a small scattering in delay time

Abstract

In a semiconductor memory device, its clock buffer includes a first comparator having a pair of P channel MOS transistors whose gates receive a clock signal and a complementary clock signal, respectively, and a second comparator having a pair of N channel MOS transistors whose gates receive the clock signal and the complementary clock signal, respectively. An internal signal is generated in response to an output signal of the comparator having a shorter response time which starts correspondingly to the cross point where the clock signal and the complementary clock signal cross each other. Even if the level of the cross point is scattered, a scatter in the response time of the internal signal which starts correspondingly to the cross point becomes small.