The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 2002
Filed:
Dec. 29, 2000
Edward P. Osburn, Folsom, CA (US);
Michael A. Stapleton, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
The present invention provides a method or process for determining a load line based variable voltage input for an Integrated Circuit (IC) product. More particularly, the present invention provides a method/process for determining a variable load line that defines voltage input (Vcc) as a function of current draw (Icc) for an IC product. In one embodiment, the method includes defining a minimum voltage relative to a reference voltage level for an IC product at a maximum current draw Icc of the IC product. A maximum voltage relative to the reference voltage level for the IC product, at a minimum current draw Icc of the IC product, is also defined. Next, a load line based upon the maximum and minimum voltages and current draws, respectively, is calculated. The load line defines the voltage requirements for the IC product as a function of current draw Icc.