The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2002

Filed:

Nov. 22, 2000
Applicant:
Inventors:

Shane Hollmer, San Jose, CA (US);

Santosh Yachareni, Santa Clara, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/126 ;
U.S. Cl.
CPC ...
G01R 3/126 ;
Abstract

A method and system for testing a semiconductor memory device applies defined test voltages to a semiconductor memory device in a manner that minimizes a time lapse during shifting from one voltage level to another or one voltage range to another. The system includes registers for storing codewords. Each codeword represents a discrete voltage level. The registers have inputs and outputs. Digital-to-analog converters are coupled to the outputs of the registers for converting a codeword into a corresponding analog voltage with a discrete voltage level. A multiplexer derives a test output voltage from the analog voltage, an external voltage, or both. A mode controller controls the multiplexer to derive the test output voltage. The test output voltage is compliant with defined voltage ranges associated with corresponding modes.


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