The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 2002
Filed:
Mar. 28, 2000
Michael J. Cummings, Vestal, NY (US);
Michael V. Longo, Glen Aubrey, NY (US);
Curtis L. Miller, Vestal, NY (US);
Thomas R. Miller, Endwell, NY (US);
Michael Wozniak, Vestal, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of making a circuitized substrate having plated through holes free of filler material is provided. The method includes the steps of providing a dielectric substrate having first and second opposite faces. At least one via hole is formed from one face to the other. A first electrically conductive layer is applied onto the top and bottom faces of the dielectric member and onto the side wall of the via. First layers of photoresist are applied to each layer of conductive material and entering at least partially into the via hole. The first layers of photoresist are selectively exposed and developed to remove all of the photoresist, except that photoresist which is disposed in the via holes. Thereafter, a portion of the faces of the metal coatings on the surfaces of dielectric material and any photoresist remaining in the holes extending above the layers of electrically conductive material are removed to form a planar surface thinner than the thickness of the metal in the through hole. Thereafter, a second layer of photoresist material is applied to both the surfaces of the metal on both faces of the dielectric material and exposed to a desired circuit pattern. Thereafter, the second layers of the photoresist material are developed to reveal the underlying metal which is then etched to form a circuit pattern in the metal layer on both faces. Thereafter, the second layers of the remaining photoresist are stripped and also the photoresist remaining in the hole is stripped, thereby to provide a circuitized substrate with plated through holes having an opening extending from the upper face of the substrate to the lower face of the substrate.