The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2002

Filed:

Feb. 07, 2002
Applicant:
Inventors:

Hengchun Mao, Plano, TX (US);

Yimin Jiang, Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/335 ;
U.S. Cl.
CPC ...
H02M 3/335 ;
Abstract

Circuit and method for reducing voltage level variation in a bias voltage generated in a power converter device are provided. The method allows providing a first voltage source configured to supply a first voltage during one respective mode of operation of the power converter, wherein the level of the voltage supplied by the first voltage source is directly proportional to variation in an input voltage of the converter device. The method further allows providing a second voltage source configured to supply a second voltage during another respective mode of operation of the power converter, wherein the level of the voltage supplied by the second voltage source has a generally inverse proportional relationship relative to variation in the input voltage of the converter device. At least one circuit parameter is selected in the voltage sources to adjust the respective levels of the first and second voltages. The first and second voltages are combined with one another to generate a combined voltage that comprises the bias voltage in the power converter device, the combined voltage resulting in a bias voltage level being relatively impervious to variation in the input voltage of the converter device.


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