The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 08, 2002
Filed:
Nov. 30, 2000
Kazuhiro Shimizu, Yokohama, JP;
Riichiro Shirota, Fujisawa, JP;
Naoki Koido, Yokohama, JP;
Seiichi Aritome, Yokohama, JP;
Hiroaki Tsunoda, Yokkaichi, JP;
Tadashi Iguchi, Yokkaichi, JP;
Kazuhito Narita, Yokkaichi, JP;
Kunihiro Terasaka, Yokkaichi, JP;
Hirohisa Iizuka, Centreville, VA (US);
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
In a nonvolatile semiconductor memory device, a charge accumulation layer is formed between adjacent two device isolation regions, at least a portion of the charge accumulation layer sandwiched with the device isolation regions has side walls each having a taper angle of 80 degrees or more and less than 90 degrees so that the charge accumulation layer at a lower end has a width wider than that at an upper end, a size of an opening of each of the device isolation regions is 0.25 &mgr;m or less, and a gate length of a memory cell is 0.2 &mgr;m or less.