The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 08, 2002
Filed:
Mar. 29, 2001
Kent Kuohua Chang, Taipei, TW;
Chia-Hsing Chen, Hsin-Chu, TW;
Macronix International Co. Ltd., Hsin-Chu, TW;
Abstract
The present invention provides a method of fabricating an improved gate of a nitride read only memory (NROM) in a semiconductor wafer. A bottom oxide and a silicon nitride layer are first formed on the surface of a silicon substrate in the semiconductor wafer, respectively, followed by injecting a tantalum penta ethoxide (Ta(OC H ) ), under the condition of 300 mTorr and 200-650° C., to form a tantalum pentaoxide (Ta O ) layer as a top oxide layer. The top oxide layer, silicon nitride layer and the bottom oxide layer compose an oxide-nitride-oxide (ONO) dielectric structure. Finally, a gate conductor layer is formed on the surface of the ONO structure to complete the fabrication of the NROM of the present invention. The tantalum pentaoxide has a high dielectric constant and is used to reduce the control gate voltage and thermal budget so as to increase the coupling ratio and yield of the semiconductor wafer.