The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6459647 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 01, 2002

Filed:

Feb. 06, 2001
Applicant:
Inventor:

Subramani Kengeri, Cupertino, CA (US);

Assignee:

Alliance Semiconductor, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 ;
U.S. Cl.
CPC ...
G11C 8/00 ;
Abstract

Apparatus, methods, and systems are disclosed for providing a memory device, such as a SDRAM, having distributed memory bank segments logically coupled to form a virtual memory bank. Each of the memory bank segments are proximally positioned relative to associated I/Os. In this way, the delay times from each of the memory bank segments to their respective I/Os are substantially equal to each other. In addition, the proximal positioning of the memory banks results in reduced signal delays due to reduced signal paths from each bank segment and respective I/O.


Find Patent Forward Citations

Kengeri, Subramani. (2002). Split-bank architecture for high performance sdrams (U.S. Patent No. 6459647). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6459647

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…