The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6458685 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 01, 2002

Filed:

May. 17, 2001
Applicant:
Inventors:

Kei-Yu Ko, Meridian, ID (US);

Dave Pecora, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ;
U.S. Cl.
CPC ...
H01L 2/14763 ;
Abstract

A bulk semiconductor substrate is provided which has an active area received between at least two undoped silicon dioxide comprising substrate isolation regions. The substrate includes at least two transistor gate constructions received at least partially over the active area. The gate constructions include gates having their sides and tops covered with insulating material comprising at least one of undoped silicon dioxide and silicon nitride. A doped silicon dioxide layer is formed over the active area, the isolation regions and the gate constructions. A patterned masking layer is formed over the doped silicon dioxide layer. The patterned masking layer has a mask opening formed therein which overlaps at least one of the gate constructions and the active area. The substrate is placed within a high density plasma etcher. The etcher has a directly coolable top power electrode, a biasable electrostatic chuck, a focus ring, and directly heatable chamber sidewalls. Plasma etching is conducted through the mask opening, using a hydrogen containing fluorocarbon chemistry, a top electrode power less than or equal to 1000W per 200 mm of substrate diameter, an electrostatic chuck bias power less than the top electrode power, directly heated chamber sidewalls at greater than 100° C., the top electrode cooled to less than or equal to 100° C. and the focus ring not being directly heated, into the doped oxide substantially selective to the active area, insulating material and any overlapped area of the substrate isolation regions to form a substantially self aligned contact opening to the active area.


Find Patent Forward Citations

Ko, Kei-Yu. (2002). Method of forming a self-aligned contact opening (U.S. Patent No. 6458685). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6458685

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