The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 2002
Filed:
Jan. 22, 1999
Hua Zheng, Fremont, CA (US);
Winbond Electronics Corporation, Hsin Chi, TW;
Abstract
A memory array architecture that supports block write operation and has many advantages over conventional memory array architectures. A memory array is partitioned into a number of (N) segments. Each segment includes at least one bit line. Each segment is associated with a local input/output (I/O) line that couples to zero or more bit lines within that segment. The bit lines are coupled to the local I/O line by controlling one or more column select lines associated with that segment. Each segment is also associated with a write driver that couples to the local I/O line. Each local I/O line has a length that is a portion of a length of the memory array. A block write operation is performed by concurrently driving one or more write drivers (up to N write drivers). Each write driver drives the bit lines coupled to the local I/O line associated with that write driver.