The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 2002
Filed:
Nov. 05, 1999
Naoko Ono, Tokyo, JP;
Yuji Iseki, Tokyo, JP;
Keiichi Yamaguchi, Tokyo, JP;
Junko Onomura, Tokyo, JP;
Eiji Takagi, Tokyo, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A high frequency semiconductor device has a semiconductor substrate such as the semi-insulating GaAs; a first metal layer disposed above the semiconductor substrate; a first dielectric thin film disposed on the first metal layer; and a second metal layer having a second metal strip disposed on the first dielectric thin film. Here, the first metal layer has a first metal strip, first and second ground metal plates sandwiching the first metal strip. And the first dielectric thin film is not disposed uniformly on the surface of the first ground metal plate so that the dielectric structure on the first metal strip differs from the dielectric structure under the second metal strip. The CPW is constituted by the first metal strip, the first and second ground metal plates, and the TFMSL is constituted by the second metal strip and the first ground metal plate. By employing the structure such that there is no dielectric thin film on the CPW portion, or that the thickness of the dielectric thin film on the CPW portion is configured to be less than the thickness of the dielectric thin film associated with the TFMSL portion, the effective dielectric constant ∈ of the CPW portion is made lower than that of the conventional CPW, which employs a uniform and homogenous dielectric structure so that the CPW portion has the same thickness of the TFMSL portion. As the result, the adjustable range of the characteristic impedance Z of the high frequency transmission line, merged in the high frequency semiconductor integrated circuit, increases. Then the high-performance integrated circuits such as MMICs having the low transmission loss, the low crosstalk can be achieved.