The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 24, 2002

Filed:

Mar. 30, 2000
Applicant:
Inventors:

Michio Horiuchi, Nagano, JP;

Shigetsugu Muramatsu, Nagano, JP;

Shigeru Mizuno, Nagano, JP;

Takashi Kurihara, Nagano, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/16 ;
U.S. Cl.
CPC ...
H05K 1/16 ;
Abstract

A wiring board and electrode of a semiconductor element are connected with each other by the method of wire bonding, and problems arising from the thermal stress generated in the process of mounting are overcome. There is provided a wiring board comprising: a first face joined to an electrode forming face of a semiconductor element and a second face on the opposite side of the first face, a wiring pattern being formed on the second face, a land joined to an external connecting terminal being formed at one end of the wiring pattern, a wire bonding section connected with a bonding wire being formed at the other end of the wiring pattern, wherein the land is supported by a buffer layer for reducing the thermal stress generated when the semiconductor element, to which the wiring board is attached, is mounted via the external connecting terminals, and the wire bonding section is supported by a bonding support layer having an elastic modulus capable of allowing wire bonding.


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