The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2002
Filed:
Sep. 21, 2000
Richard Lai, Redondo Beach, CA (US);
Ronald W. Grundbacher, Hermosa Beach, CA (US);
Yaochung Chen, Rancho Palos Verdes, CA (US);
Michael E. Barsky, Sherman Oaks, CA (US);
TRW Inc., Redondo Beach, CA (US);
Abstract
An enhancement mode FET device ( ) that employs a strained N-doped InAlAs charge shield layer ( ) disposed on an intrinsic InAlAs barrier layer ( ). A gate metal electrode ( ) of the FET device ( ) is controllably diffused through a recess ( ) into the shield layer ( ) to the barrier layer ( ). The resulting enhancement mode device ( ) provides an excellent Schottky barrier with a high barrier height that inhibits undesirable surface depletion effects through charge shielding by the shield layer ( ) in the regions between the recess edge and the gate metal. Minimizing surface depletion effects makes the device more robust by making the surface less sensitive to processing conditions and long-term operation effects.