The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2002
Filed:
Sep. 07, 1999
Samuel L. Coffman, Scottsdale, AZ (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A process for manufacturing a semiconductor device ( ) using selective plating and etching to form the packaging for such device. A flat sheet ( ) of conductive material is selectively plated with a conductive etch resistant material to form a plurality of die attach areas ( ) on one side ( ) of the sheet ( ) and to define die contact ( ) and lead contact ( ) areas on the opposite side ( ) of the sheet. Mold locks ( ) which also serve as interconnect bonding areas are selectively plated on the side ( ) of the sheet in association with each of the die attach areas ( ). Semiconductor die ( ) are attached to each of the die attach areas ( ) and bonded ( ) to the tops of the mold locks ( ). A unitary molded resin housing ( ) is formed overlying all of the semiconductor device die ( ). The underside ( ) of the conductive sheet ( ) is selectively etched using the plated etch resistant material ( ), ( ) as an etch mask to form isolated die contact areas ( ) and lead contact areas ( ). The unitary housing ( ) can then be sawed to separate the plurality of the semiconductor device die into a plurality of individual device structures ( ).