The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2002
Filed:
Apr. 27, 2001
Applicant:
Inventors:
Gopal Vijayan, Austin, TX (US);
James S. Blomgren, Austin, TX (US);
Donald W. Glowka, Austin, TX (US);
Stephen C. Horne, Austin, TX (US);
Assignee:
Intrinsity, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/900 ;
U.S. Cl.
CPC ...
H03K 1/900 ;
Abstract
The present invention is a dynamic logic propagation delay targeting tool that includes a gate target delay initializer , a levelizer , a backward logic scanner , a forward logic scanner , a gate target delay incrementor , and a gate target delay comparator that together calculates the propagation delay of a signal in a specified block of dynamic logic.