The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2002
Filed:
Apr. 16, 2001
Janos Farkas, Austin, TX (US);
Brian G. Anthony, Austin, TX (US);
Abbas Guvenilir, Round Rock, TX (US);
Mohammed Rabiul Islam, Austin, TX (US);
Venkat Kolagunta, Austin, TX (US);
John Mendonca, Austin, TX (US);
Rajesh Tiwari, Plano, TX (US);
Suresh Venkatesan, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A copper interconnect polishing process begins by polishing ( ) a bulk thickness of copper ( ) using a first platen. A second platen is then used to remove ( ) a thin remaining interfacial copper layer to expose a barrier film ( ). Computer control ( ) monitors polish times of the first and second platen and adjusts these times to improve wafer throughput. One or more platens and/or the wafer is rinsed ( ) between the interfacial copper polish and the barrier polish to reduce slurry cross contamination. A third platen and slurry is then used to polish away exposed portions of the barrier ( ) to complete polishing of the copper interconnect structure. A holding tank that contains anti-corrosive fluid is used to queue the wafers until subsequent scrubbing operations ( ). A scrubbing operation ( ) that is substantially void of light is used to reduce photovoltaic induced corrosion of copper in the drying chamber of the scubber.