The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2002

Filed:

Jun. 18, 2001
Applicant:
Inventors:

Ties Ramcke, Müchen, DE;

Lothar Risch, Neubiberg, DE;

Wolfgang Rösner, Ottobrunn, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/02 ;
U.S. Cl.
CPC ...
H05K 7/02 ;
Abstract

At least one CMOS component which is configured in a semiconductor substrate is part of the inventive circuit assembly. An insulating layer is configured on the semiconductor substrate. The insulating layer covers the CMOS component. A nanoelectronic component is configured above the insulating layer. At least one conducting structure is configured in the insulating layer and serves to link the nanoelectronic component with the CMOS component. If several nanoelectronic components are provided, they are preferably grouped to nano-circuit blocks. Each of the nano-circuit blocks is so small that the RC times of their lines do not exceed 1 ns.


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