The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2002
Filed:
Oct. 21, 1998
Helmut Klose, Poughkeepsie, NY (US);
Volker Lehmann, München, DE;
Hans Reisinger, Grünwald, DE;
Wolfgang Hönlein, Unterhaching, DE;
Infineon Technologies AG, Munich, DE;
Abstract
An integrated circuit configuration, in particular is a DRAM cell configuration, includes a capacitor disposed on a first substrate and a portion with a contact disposed on a second substrate. The first substrate is connected to the second substrate, with the contact adjoining the capacitor. The first substrate and the second substrate can be connected essentially in an unadjusted manner, if capacitor elements are distributed over the first substrate and a contact surface of the contact is so large that when the substrates are connected, the contact in each case adjoins at least one of the capacitor elements, which then defines the capacitor. The capacitor may include a plurality of capacitor elements, which makes its capacitance especially high. A method is also provided for producing the integrated circuit configuration.