The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2002
Filed:
Sep. 18, 2000
Hyung-suk Cho, Kyungki-do, KR;
Sang-mun Chon, Kyungki-do, KR;
Sang-bong Choi, Kyungki-do, KR;
Chung-sam Chun, Kyungki-do, KR;
Min-sub Kang, Kyungki-do, KR;
Abstract
Embodiments of the present invention include methods for measuring a semiconductor wafer which has been subjected to an etching process. Light is radiated at the semiconductor wafer. Light within a selected wavelength band reflected from the semiconductor wafer is measured to provide an output value. A ratio of the output value and a reference value is determined. The reference value may be based on light within the selected wavelength band reflected from a reference surface, such as a bare silicon reference surface. It is determined that the semiconductor wafer is under-etched if the determined ratio does not meet the reference value. A normalized optical impedance or a polarization ratio may be measured based on light within a selected wave length band reflected from the semiconductor wafer to provide the output value in various embodiments of the present invention. In further aspects of the present invention, a thickness of a remaining oxide layer is determined using an under-etch recipe when it is determined that a semiconductor wafer is under-etched and a thickness of a damaged/polymer layer may be determined using an over-etch recipe when it is determined that the semiconductor wafer is over-etched.