The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2002

Filed:

Mar. 31, 1998
Applicant:
Inventors:

Lawrence T. Clark, Phoenix, AZ (US);

Mark A. Beiley, Chandler, AZ (US);

Eric J. Hoffman, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 5/217 ;
U.S. Cl.
CPC ...
H04N 5/217 ;
Abstract

An architecture for self-calibration and fixed-pattern noise removal in imager chips. The column-to-column fixed pattern noise and/or pixel-to-pixel fixed pattern noise is determined through a self-calibration operation. During operation of the imager chip, when a value of a pixel is read, the read value is compensated with the fixed-pattern noise corresponding to either the column fixed pattern noise corresponding to the column having the pixel from which the value was read or to the pixel fixed pattern noise corresponding to the pixel from which the value was read.


Find Patent Forward Citations

Quick Actions:

Clark, Lawrence. (2002). Method and apparatus for self-calibration and fixed-pattern noise removal in imager integrated circuits (U.S. Patent No. 6433822). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6433822

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…