The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2002

Filed:

Mar. 30, 2000
Applicant:
Inventor:

Chine-Gie Lou, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/120 ;
U.S. Cl.
CPC ...
H01L 2/120 ;
Abstract

A process for fabricating a capacitor suitable for forming a bottom electrode layer of the capacitor on a substrate. First, a first dielectric layer is formed on a substrate. Then, a portion of the first dielectric layer is removed to form a contact hole. A conductive plug is formed within the contact hole. A seed layer is formed on the conductive plug. A sacrifice layer is formed on both the seed layer and the first dielectric layer. A predetermined region of the sacrifice layer is removed to form a recess so as to expose the seed layer. Then, a bottom electrode layer is formed by electroplating within the recess. The sacrifice layer is removed afterwards. Finally, a second dielectric layer and a top electrode layer are formed on the bottom electrode layer in sequence. The present invention is characterized in that it does not require a direct etching process on a platinum material to. form the bottom electrode layer. As a result, problems encountered during the platinum etching process such as the difficulty in controlling the critical dimension of an etched platinum bottom electrode layer can be overcome.


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