The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2002

Filed:

Mar. 03, 2000
Applicant:
Inventors:

Robert Lee Lewis, Apalachin, NY (US);

Robert David Sebesta, Endicott, NY (US);

Daniel Martin Waits, Manassas, VA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/144 ;
Abstract

A method of making a circuitized substrate for use in an electronic package wherein the substrate, e.g., ceramic, includes more than one conductive layer, e.g., copper, thereon separated by a suitable dielectric material, e.g., polyimide. Each layer includes its own conductive location(s) which are designed for being directly electrically connected, e.g. using solder, to respective contact sites on a semiconductor chip to form part of the final package. Significantly, the resulting package does not include interconnections between the conductive layers at the desired contact locations; these locations, as mentioned, instead being directly connected to the chip.


Find Patent Forward Citations

Lewis, Robert. (2002). Method for connecting an electrical device to a circuit substrate (U.S. Patent No. 6429113). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6429113

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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