The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2002
Filed:
Jan. 22, 2001
Perumal Ratnam, Fremont, CA (US);
Ritu Shrivastava, Fremont, CA (US);
Alliance Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A flash EPROM cell ( ) is disclosed having increased capacitive coupling between a floating gate ( ) and a control gate ( ). Vertical structural elements ( and ) are formed on field oxide regions ( ) on opposing sides of the flash EPROM cell channel , in the channel width direction. The structural elements ( and ) include relatively vertical faces. The floating gate ( ) conformally cover the channel and the vertical faces of the structural elements ( and ). The control gate ( ) conformally covers the floating gate ( ). The vertical displacement introduced by the structural elements ( and ) increases the overlap area between the floating gate ( ) and the control gate ( ) without increasing the overlap area of the floating gate ( ) and the channel , resulting in increased capacitive coupling between the control gate ( ) and the floating gate ( ). A process is disclosed which enables the formation of the above structural elements ( and ) with dimensions that are smaller than those normally achievable by the minimum resolution of lithography equipment.