The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2002

Filed:

Oct. 09, 1998
Applicant:
Inventors:

Xiao Yu Li, San Jose, CA (US);

Sunil D. Mehta, San Jose, CA (US);

Christopher O. Schmidt, Sunnyvale, CA (US);

Assignee:

Lattice Semiconductor Corporation, Hillsboro, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H07L 2/9788 ;
U.S. Cl.
CPC ...
H07L 2/9788 ;
Abstract

An improved EEPROM cell with a self-aligned tunneling window is provided which is fabricated by a standard STI process so as to produce a smaller layout size and a reduced cell height. The EEPROM cell includes a floating gate, a programmable junction region, and a tunneling oxide layer separating the programmable junction region and the floating gate. The length dimension of the floating gate is less than the length dimension of the tunneling window so that the tunneling window is overlapping the floating gate. The tunneling window is self-aligned by edges forming the length dimension of the floating gate so as to form a self-aligned tunneling window.


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